[USRP-users] Another question regarding uhd_usrp_probe, NoC Script and my RFNoC XML file
Craig.Swanson at gtri.gatech.edu
Wed Oct 28 15:30:42 EDT 2015
?Jonathon and Martin,
What would be ideal is if I could write up my XML file so when I run uhd_usrp_probe --arg no_load_fpga that it fires up the crossbar and comes close to imitating my system verilog testbench file in the lib/rfnoc directory. I would like to read and write to certain register locations several times, and even send packets of data which I could trigger on using Chipscope. That would allow me to have to avoid going through the somewhat time consuming integration with gnuradio.
Would that be possible or could you modify or create another uhd_usrp_probe utility that would excercise the FPGA with commands similar to the System verilog testbench?
I have sent you several emails lately so I hope I didn't already ask you this question.
Craig F. Swanson
Research Engineer II
Information and Communications Laboratory
Communications, Systems, and Spectrum Division
Georgia Tech Research Institute
250 14th St NW
Atlanta, GA 30318
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