[USRP-users] USRP E100 - updating UHD

Leonardo S. Cardoso leonardo.sampaio-cardoso at inria.fr
Fri Jul 3 09:08:50 EDT 2015


Hello everyone, 

I’m facing some problems trying to update the UHD version of my USRP E100.

I’ve followed the steps described in the redmine: http://code.ettus.com/redmine/ettus/projects/usrpe1xx/ <http://code.ettus.com/redmine/ettus/projects/usrpe1xx/> to update the kernel modules as well as to re-compile UHD from the sources. Whenever I try to launch any uhd command to test the new installation I get:

linux; GNU C++ version 4.5.3 20110311 (prerelease); Boost_104500; UHD_003.005.004-140-gfb32ed16


Creating the usrp device with: ...
-- Loading FPGA image: /usr/local/share/uhd/images/usrp_e100_fpga_v2.bin... done = 1
-- Configuration complete.
-- Initializing FPGA clock to 64.000000MHz...
-- USRP-E100 clock control: 10
--   r_counter: 2
--   a_counter: 0
--   b_counter: 20
--   prescaler: 8
--   vco_divider: 5
--   chan_divider: 5
--   vco_rate: 1600.000000MHz
--   chan_rate: 320.000000MHz
--   out_rate: 64.000000MHz
-- 
-- Opening device node /dev/usrp_e0...
-- Performing control readback test... Error: RuntimeError: fifo ctrl timed out looking for acks

I’ve been googling for a while for an answer but with no luck. Do you guys have any clues on how to fix this?

Best regards,

Leo

--
Leonardo S. Cardoso
Associate Professor
CITI lab, INSA-Lyon - INRIA



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