[USRP-users] How to build customized USRP N2xx FPGA image?

Ian Buckley ianb at ionconcepts.com
Tue Sep 2 13:02:48 EDT 2014


Cheng Chi,
I'm curious to know if you see any error messages about shared library problems …these will not appear in build.log because they are sent to STDERR not STDOUT. They will look like this snippet:

2ac237c49000-2ac237c5d000 r-xp 00000000 08:01 15090915                   /opt/Xilinx/12.1/ISE_DS/ISE/lib/lin64/libHdcC_PartitionHelper.so
2ac237c5d000-2ac237d5c000 ---p 00014000 08:01 15090915                   /opt/Xilinx/12.1/ISE_DS/ISE/lib/lin64/libHdcC_PartitionHelper.so
2ac237d5c000-2ac237d5e000 rw-p 00013000 08:01 15090915                   /opt/Xilinx/12.1/ISE_DS/ISE/lib/lin64/libHdcC_PartitionHelper.so
2ac237f5f000-2ac238360000 rw-p 00000000 00:00 0 
7fffbb676000-7fffbb773000 rw-p 00000000 00:00 0                          [stack]
7fffbb7d6000-7fffbb7d7000 r-xp 00000000 00:00 0                          [vdso]
ffffffffff600000-ffffffffff601000 r-xp 00000000 00:00 0                  [vsyscall]
INFO:TclTasksC:1850 - process run : Generate Programming File is done.
lk/wr_rst_reg_0)            | 2     |
u2p_c/simple_gemac_wrapper/tx_2clk_fifo/fifo_2clock/..fifo_xlnx_512x36_2clk/BU2/U0/grf.rf/rstblk/wr_rst_comb(u2p_c/simple_gemac_wrapper/tx_2clk_fifo/fifo_2clock/..fifo_xlnx_512x36_2clk/BU2/U0/grf.rf/rstblk/wr_rst_comb1:O) | NONE(u2p_c/simple_gemac_wrapper/tx_2clk_fifo/fifo_2clock/..fifo_xlnx_512x36_2clk/BU2/U0/grf.rf/rstblk/wr_rst_reg_0)           | 2     |
u2p_c/sysctrl/POR(u2p_c/sysctrl/POR:Q)                                                                                                                                                                                        | NONE(u2p_c/sysctrl/ram_loader_rst_o)    

You will see them in the shell or you can capture to file using:

make -f Makefile.N210R4 2>&1 | tee logfile

-Ian

p.s We can only help with you verilog syntax error if you share the code that has the error


On Sep 1, 2014, at 10:45 PM, Cheng Chi <ch0004hi at e.ntu.edu.sg> wrote:

> Hi Ian,
> 
> Thanks for your reply.
> 
> I found an earlier discussion on the mailing list, someone solved the problem by removing the #(.WIDTH(WIDTH)) reference from the line. Is it the right way to do? (I am not familiar with verilog syntax)
> 
> 
> I just ran another test. I didn't include any custom module, and ran `make -f Makefile.N200R4 bin`. I only changed the BUILD_DIR for Makefile.N200R4 bin as below. I am still having the same Process "Synthesize - XST" failed. But this time, I didn't see the syntax error as last time.
> 
> ##################################################
> # Project Setup
> ##################################################
> TOP_MODULE = u2plus
> # BUILD_DIR = $(abspath build$(ISE)-N200R4)
> BUILD_DIR = /home/usrp/uhd/fpga/usrp2/top/N2x0/build-custom
> 
> # set me in a custom makefile
> CUSTOM_SRCS =
> CUSTOM_DEFS =
> 
> The output of bash terminal:
> https://gist.github.com/anonymous/97dacf1b758727ae6b1a
> 
> The build.log file:
> https://gist.github.com/anonymous/1ce58109a930ee338e6a
> 
> Best regards,
> Cheng Chi
> 
> 
> On Tue, Sep 2, 2014 at 12:12 PM, Ian Buckley via USRP-users <usrp-users at lists.ettus.com> wrote:
> Cheng Chi,
> The clue is here: 
> 
> 
> ERROR:HDLCompiler:806 - "/home/usrp/uhd/fpga/usrp2/sdr_lib/dsp_rx_glue.v" Line
>    66: Syntax error near "#".
> ERROR:HDLCompiler:806 - "/home/usrp/uhd/fpga/usrp2/sdr_lib/dsp_rx_glue.v" Line
>    96: Syntax error near "endgenerate".
> -Ian
> 
> On Sep 1, 2014, at 8:56 PM, Cheng Chi via USRP-users <usrp-users at lists.ettus.com> wrote:
> 
>> Hi,
>> 
>> I am trying to build custom image for N200 with the following setup:
>> - Ubuntu 12.04, 64 bit
>> - ISE 12.2
>> - Free license download from Xilinx website
>> 
>> However, after several minutes of compiling, there is this error Process "Synthesize - XST" failed - Xilinx. 
>> 
>> The detail build log is uploaded here:
>> https://gist.github.com/anonymous/1ed97d93fbf879990500
>> 
>> The Makefile.custom I am using:
>> https://gist.github.com/anonymous/3049cc02064250f80d6b
>> 
>> 
>> I am following this guide for building customized image:
>> http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2013-April/006558.html
>> 
>> The PATH environment:
>> /opt/Xilinx/12.2/ISE_DS/common/bin/lin64:/opt/Xilinx/12.2/ISE_DS/PlanAhead/bin:/opt/Xilinx/12.2/ISE_DS/ISE/bin/lin64:/opt/Xilinx/12.2/ISE_DS/ISE/sysgen/util:/opt/Xilinx/12.2/ISE_DS/EDK/bin/lin64:/usr/lib/lightdm/lightdm:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games
>> 
>> The bash file I am using for building:
>> #! /bin/bash  
>> 
>> export LM_LICENSE_FILE=/home/usrp/Downloads/Xilinx.lic
>> export XILINXD_LICENSE_FILE=/home/usrp/Downloads/Xilinx.lic
>> 
>> LD_LIBRARY_PATH=/usr/lib:/lib:${LD_LIBRARY_PATH}
>> 
>> cd /opt/Xilinx/12.2/ISE_DS
>> source ./settings64.sh     # sets up path and other shell variables
>> cd /home/usrp/uhd/fpga/usrp2/top/N2x0
>> make -f Makefile.custom bin
>> 
>> Thanks for any help you can provide in this situation.
>> 
>> Best regards,
>> Cheng Chi
>> 
>> 
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>> USRP-users mailing list
>> USRP-users at lists.ettus.com
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
> 
> 
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