[USRP-users] Toggling GPIO's from USRP FPGA

Anum Sheraz anumsheraz1 at hotmail.com
Tue Oct 28 00:47:42 EDT 2014

Hi there,

I have configured a new custom block inside the FPGA of USRP N210. This block contains a simple 6 bit up Counter. and i've connected the these 6bits output to the io_tx[15:10] line on the FPGA. instead of io_tx[15:0] going directaly to the GPIO_atr module, now its 6 bits [15:10] are connected to the counter's output and the remaining 10 bits are not used. 

I've tested the output of these Pins
        on oscilloscope, but i see a strange fix pattern of sin wave. i am expecting to see a square pulse.

My daughter board is WBX and a Simple Granddaughterboard , GPIO pins that are available are brought out to
    J15 on the GDB for WBX. I was reading the schematic of this GDB and i found out some conditions of using these GPIO. do i need to keep the io_rx[15]=0 ?

its all going above my head. Does anyone has any idea about this ? 

Any help will be highly appreciated.
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