[USRP-users] B210 custom UHD chain module ( for example FIR filter or WBFM demod ) in verrilog example?

Ben Biles benbiles at gmail.com
Wed Oct 15 10:44:39 EDT 2014

Hi, does anyone know if there are any example custom UHD chain modules
( for example FIR filter or WBFM demod ) in HDL anywhere for USRP B410
xilinx harware?

I would like to try and design a 10 channel WBFM ( 200khz bandwidth
per channel ) deviersity reciever in verilog in ISE.

I am assuming I would have to modify the USRP UHD and add verilog
modules of code in the two reciever chains in order to do this?
How do I learn more about this ?

What are the chances of fitting this into the remaining space on the
Xilinx FPGA on the B210? I believe it is slightly larger than
the FPGA on the B200, and obvoiusly I need 2 x RX for a diversity
capable reciever so B200 out anyway!

I will attempt to build it fist in GNUradio blocks but expect my i7
cpu will grind to halt !! what are the chances the FPGA will cope?

any ideas much welcome !


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