[USRP-users] ATR registers

Per Zetterberg perz at kth.se
Thu Oct 9 14:29:35 EDT 2014


Thank you for your answer Ian!

I know I had the same setting for IDLE and RX. I do have a  set_pin_ctrl call. I tried DDR also but my understanding is that it shouldn't matter for ATR but only for GPIO.

Thanks again,
Per 

________________________________________
From: Ian Buckley [ianb at ionconcepts.com]
Sent: Thursday, October 09, 2014 7:50 PM
To: Per Zetterberg
Cc: usrp-users at lists.ettus.com
Subject: Re: [USRP-users] ATR registers

Per,
A couple of quick observations.
1) The example you present below writes both the IDLE state and RX state with the same values (atr_rx) so you would not see a transition of GPIO pins between those states.
2) You haven't shown a configuration write ti the DDR register which is defined as:

The CTRL reg determines whether the GPIO is driven by internal state changes in the radio streaming control logic or if it just works like traditional bit-banged GPIO. 0=Manual mode 1=ATR
The DDR reg (data direction register) sets port direction…where a 1 is an output, 0 is an input
The OUT reg controls the bit values driven on output configured GPIOs.

Hope this helps
-Ian

On Oct 9, 2014, at 4:31 AM, Per Zetterberg via USRP-users <usrp-users at lists.ettus.com> wrote:

> Dear List,
>
>
> I am trying to use the ATR registers with a basic daughterboard. I do:
>
> db_iface->set_pin_ctrl(m_unit,mask_write,mask_write);
> db_iface->set_atr_reg(m_unit,
>                  uhd::usrp::dboard_iface::ATR_REG_IDLE,atr_rx,mask_write);
>    db_iface->set_atr_reg(m_unit,
>                  uhd::usrp::dboard_iface::ATR_REG_TX_ONLY,atr_tx,mask_write);
>    db_iface->set_atr_reg(m_unit,
>                  uhd::usrp::dboard_iface::ATR_REG_RX_ONLY,atr_rx,mask_write);
>
>
> Upon writing these values the settings of ATR_REG_IDLE should immediately take effect until we ask the USRP to send or receive samples. But this does not seem to be the case. Am I making a mistake?
>
> BR/
> Per
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