[USRP-users] Need advice to find out the appropriate place in module radio of X310 FPGA code to observe sample streams

Ian Buckley ianb at ionconcepts.com
Sun Oct 5 03:40:11 EDT 2014

Do you want to observe a sample stream at the ADC/DAC rate or the sample rate over-the-wire to UHD/GNURadio?

On Oct 4, 2014, at 10:38 PM, Isen I-Chun Chao via USRP-users <usrp-users at lists.ettus.com> wrote:

> Hi,
> I am tracing radio.v of X310 FPGA code and trying to figure out the data path and control path so I can find an appropriate place of observing the incoming sample stream from ADC and outgoing sample stream to DAC. We hope to add a customized module which can monitor both sample streams and create timestamp information for application layers. However, since I only can learn how this module, radio.v, works by viewing the source code, which is more complicated than I thought, I am actually lost in it.
> For example in rx path, I did find there is signals from 'rx_dsp.ddc_chain' called samples[31:0] connecting to the module 'new_rx_framer' to produce o_tdata[63:0], but then I can't figure out the operating logic in the rest of modules, such as module 'new_rx_control', 'rx_sfc', ..., this signal go through.
> Maybe based on what we need we don't have to understand each part in radio.v, and we just need to know how some critical subsets of this module works to achieve our objective? Or we just need to know where is the right place for adding our customized module?
> As the matter of fact, we have spent few weeks on it and so far we have no progress. Could anyone please advise me? I would very appreciate it.
> Thanks
> Best Regards,
> Isen I-Chun Chao
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