[USRP-users] VHDL and RFNoC
eddie at isatec.ca
Sun Dec 28 15:21:51 EST 2014
So after feedback from both Ian and Martin and some further reading I've
decided that my best course of action for a project I'm involved in is
the new RFNoC system. To recap, I've got a QPSK encoder written in VHDL
that takes a clocked sequence of symbols (std_ulogic_vector(1 downto 0))
and outputs a sequence of symbols clocked at a a slightly higher rate
(redundant data has been added).
From what I can tell, I need to use the the NoC shell to wrap up my
encoder VHDL module. I've been looking through the Verilog examples in
the Git repository but am unfortunately not as familiar with Verilog as
I am with VHDL. I supposed my questions are simply the following:
* Are there any working examples of a computational engine written
in VHDL? Along with it's use of the NoC shell?
* Any examples of simply taking a serial sequence (of say samples)
and converting to/from these packets that are required? Or is
this what the NoC shell accomplishes.
* Or is the end result of the (de)packetization simply a hunk of
data that I can do with as I please?
* Can I get the gnuradio build to send symbols instead of samples?
In this case it would ultimately just be a two bit integer.
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