[USRP-users] B2xx fpga modification

Zhang, Yunfan Donald - 0666 - MITLL d.zhang at ll.mit.edu
Tue Dec 16 17:42:16 EST 2014


Hi List,

 

I am looking for resource to help me understand the current design of the
third generation FPGA (usrp3) and suggestions on where is a good place to
insert my custom fpga code.  I know this is a very generalized question but
at this point I am just trying to understand the fpga code better.  There
are a few words in the readme in the fpga repository on customizing the HDL
with gen 2 products, but nothing on gen 3.   

 

Thanks

 

Donald Zhang

Electrical Engineer

MIT Lincoln Lab

244 Wood Street

Lexington, MA 02421

781-981-7698

 

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/attachments/20141216/cfb4caa0/attachment-0002.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: smime.p7s
Type: application/x-pkcs7-signature
Size: 5410 bytes
Desc: not available
URL: <http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/attachments/20141216/cfb4caa0/attachment.p7s>


More information about the USRP-users mailing list