[USRP-users] USRP X310 motherboard issues

Timothy Schaffer reffahcs at gmail.com
Sun Dec 14 14:24:55 EST 2014


Just wanted to close the loop on this for historical purposes. This problem
was in fact resolved by updating the FPGA firmware and was not related to
any hardware issues. A quick RX cal after updating the firmware cleared up
any discrepancies that were left between the two subdevs.

On Wed, Dec 10, 2014 at 6:40 PM, Matt Ettus <matt at ettus.com> wrote:
>
>
> The timing error is caused by an unconstrained path, so some builds will
> work and some won't.  I don't know if that version and the particular image
> you would be using were ones that worked or didn't.  You can try, but I'd
> suggest just waiting for the known good ones to come tomorrow.
>
> Matt
>
>
>
> On Wed, Dec 10, 2014 at 3:33 PM, T via USRP-users <
> usrp-users at lists.ettus.com> wrote:
>
>> Matt - that makes sense, the glitches are apparent on the scope attached
>> to subdev B. No worries, this is really the first weekend I've tried to
>> work on the X310 since I got it, so I was concerned there may have been a
>> hardware issue with it. Do you know if the UHD 3.7.2 drivers have the same
>> glitch? I was thinking about installing them tonight.
>>
>> -Tim
>>
>> Sent from my iPad
>>
>> On Dec 10, 2014, at 14:37, Matt Ettus <matt at ettus.com> wrote:
>>
>>
>> Tim,
>>
>> This is actually caused by a timing problem that crept into the FPGA
>> builds because we had an unconstrained path.  What you are seeing is
>> signals passing between clock domains and sometimes a few bits don't make
>> it in time so you get a glitch.  We noticed it a few days ago, and have
>> fixed it.  We are building new images in all the variations, and the new
>> builds will be available tomorrow.  Sorry for the inconvenience.
>>
>> Thanks,
>> Matt
>>
>>
>> On Wed, Dec 10, 2014 at 10:02 AM, Timothy Schaffer via USRP-users <
>> usrp-users at lists.ettus.com> wrote:
>>
>>> I received an X310 from NI last week along with 2 x WBX-120 boards and
>>> I've noticed a difference in signal quality between the A and B subdevs of
>>> the motherboard. Overall, It seems the signals receive from the B side are
>>> generally distorted and prone to harmonics. I naturally assumed this was an
>>> issue with the WBX boards, so I swapped them and noticed the same issues.
>>> Next I swapped the cables connected to the bulkhead and still the same
>>> issue.
>>> I''m currently using UHD 3.008.000-52, but have not tried other
>>> versions. I've reloaded the FPGA firmware, ran all 3 cal routines on both
>>> subdevs. I'm not sure what else to try? I'v eattached a couple of screen
>>> shots of some of the tests I performed with an HP E4432B. The tests were
>>> done back to back using the same cable from the siggen to the USRP.
>>>
>>> You can see in these two screen shots, the actual distortion to the
>>> waveform in the scope.
>>> <multi_tone_B.png>.<multi-tone_A.png>
>>>
>>> Here is a DQPSK(24.3ksps) test signal at 303 MHz
>>>
>>> <QPSK_A.png><QPSK_B.png>
>>>
>>> Any ideas on what could be wrong, or does it need to go back to NI for
>>> repair/replace?
>>>
>>> -Tim
>>>
>>> _______________________________________________
>>> USRP-users mailing list
>>> USRP-users at lists.ettus.com
>>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>>
>>>
>>
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