[USRP-users] Addressing custom logic in fpga
Marcus D. Leech
mleech at ripnet.com
Tue Feb 12 21:16:34 EST 2013
> I'm working on a project that involves modifying the fpga contents and
> adding an additional DDC that works in parallel to the first DSP
> block. The idea would be to sample the same data at two different
> center frequencies. I'd like to be able to program these frequencies
> separately through the API but am worried there may not be enough room
> in the address map. Is there a simple way to do this without making
> many changes to the API? Would it be possible to configure them under
> the same address?
> USRP-users mailing list
> USRP-users at lists.ettus.com
Which base platform?
There's already dual-DDC support in some of the platforms, the N2XX in
Shirleys Bay Radio Astronomy Consortium
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