[USRP-users] Questions about the FPGA boot sequences in USRP N210?
nick at ettus.com
Tue Apr 23 15:44:57 EDT 2013
M2M1M0 is 001, not 000. The pulldown on M0 is not populated and there are
internal pullups on that pin. The configuration is set up to boot from
Flash as a SPI Master.
On Tue, Apr 23, 2013 at 12:35 PM, Edmund Pan <panedmund at yahoo.com> wrote:
> I am trying to modifiy the FPGA code of the USRP N210. My question is
> where I should store the FPGA configuration file? I just checked the N210
> schematic, and saw that the board just has one 32Mbit flash(M25P32) and one
> 2K EEPROM(24Lc024). I assume that the FPGA configuration file is stored in
> the flash. When the USRP N210 Device is powered on, the FPGA congiuration
> file is loaded to FPGA. It this correct?
> Howevrer, what I am confused is that I just check the FPGA boot pin
> configuration status which is M2M1M0="000", that means when the FPGA is
> power on, it should load frome some platform flash. But, actually, there is
> no platform flash in the USRP N210 device at all. Is there anyone be kind
> enough to explain what the FPGA boot sequence in USRP N210 is? Thank you so
> USRP-users mailing list
> USRP-users at lists.ettus.com
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