[USRP-users] Timing constraints violations using custom_dsp_rx module
florian.schlembach at tu-ilmenau.de
Wed Apr 3 04:18:12 EDT 2013
Don't know why the last post didn't make through to the list.
Apparently, it was because of the attachements.
I solved the problem by inserting another pipeline stage after the
time_compare module and thereby delaying the strobe_reg by another cycle:
always @(posedge clock) begin
if (reset || clear) strobe_reg <= 0;
action_reg <= action;
strobe_reg <= action_reg && poke;
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