[USRP-users] Purpose of 24-bit CORDIC in DDC chain?

mleech at ripnet.com mleech at ripnet.com
Tue Apr 2 09:57:58 EDT 2013


On 02 Apr 2013 08:59, Florian Schlembach wrote: 

> I am just
analysing the FPGA code of the DDC chain. I just got stuck 
> when
trying to find out the purpose of the CORDIC that comes right after 
the ADCs.
> According to my understanding, the only purpose of the
CORDIC is to add 
> a certain phase increment using an efficient
> implementation. The subsequent decimation of
incoming, 100 MHz sampled 
> data (dealing with N210) is then performed
via the CIC and Halfband filters.
> Is that correct?
> USRP-users mailing
> USRP-users at lists.ettus.com

used to do arbitrary up/downconversion, with high precision, of the
sample stream coming off the ADC. 

Many daughtercards have fairly
coarse tuning step size, so the CORDIC in the FPGA is used in those
cases to tune to a precise frequency, as requested by the user. 

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