[USRP-users] Synchronizing Data Streams from multiple N210 boards on FPGA

Yasir Javed yasirjaved at gmail.com
Sun Jun 10 18:01:22 EDT 2012

We are working on a MIMO-OFDM system using two USRP N210s. We want our
Synchronization algorithm to be implemented on FPGA instead of Software.
The algorithm needs to process coherent DDC data samples from both boards.

Is it possible to forward data from one N210 to another where I can
implement the Synchronization logic?
If so, how can I make one FPGA logic wait until I get samples at almost
exactly the same time instant from the other board?
At what points in the verilog code would you suggest to make changes?

My understanding so far is that I can modify dsp_rx_glue.v to add custom
processing on DDC out samples (bb_sample and bb_strobe). What I am not
clear is where would I get samples from the other N210 board. My initial
guess was to use MIMO cable. But it seems that MIMO cable is used for
sharing timing information to synchronize capturing time, its not used for
data transfers  (Is my understanding right?). So the next solution I could
think of was to send packets from one N210 to other. I am so far unable to
figure out where I would be able to intercept data in that case. Secondly
by the time one N210 is waiting for samples from other N210, the DDC out
samples have to be saved somewhere (in a FIFO).. Is the network delay
deterministic to decide a safe FIFO size? Thirdly, My understanding is that
timing information is added in vita_rx_chain.v which comes after
dsp_rx_glue.v where I can get DDC out samples, how can I figure out the
timing information of DDC samples from both boards in dsp_rx_glue.v?

Am I missing some simpler way to do this?

Yasir Javed
IQRA University
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