[USRP-users] a question of FPGA resouce consumption

leonzyz leonzyz at gmail.com
Mon Feb 27 02:14:39 EST 2012


Hi ,All,
I downloaded the source code from
https://github.com/EttusResearch/UHD-Mirror ,
and built the fpga project ,but I find my project uses
more resource than ettus.com's FAQ said. It says that the N210 fpga's
resouce:
General Logic: 63% free
Memory: 66% free
DSP Resources: 88% free
but, my project's map report says:
Logic Utilization:
Number of Slice Flip Flops: 19,122 out of 47,744 40%
Number of 4 input LUTs: 28,910 out of 47,744 60%
Logic Distribution:
Number of occupoed Slices: 18,784 ou of 23,872 78%

I used the command "make -f Makefile.N210R3" to build the project .Is there
anything (eg. synthesis options) I forgot to add that may lead to more
resouce
to be consumed? Or the project has really consumed so many resouces?

I noticed that someone said that there are 2 dsp processing modules in
the fpga project
but only one used,is that true? and how many resouces can I get by
taking out the unused
dsp processing module?

Thanks






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