[USRP-users] aeMB and ZPU
wei.liu at intec.ugent.be
Fri Feb 24 04:17:16 EST 2012
I see there are two embedded processors in the USRP2 FPGA projects, the
aeMB and the ZPU. but I in the firmware I only see the firmware for
ZPU. Where is the code running on aeMB?
So I wonder what are the functionality of both processors? How do they
interact with each other?
Are there some documents containing the block diagram of the complete
design of usrp2 ? I find it quite hard to learn just based on the ISE
More information about the USRP-users