[USRP-users] Fwd: USRP2 FPGA Held in Reset?

Brian Heilig heilig.brian at gmail.com
Thu Feb 23 10:12:56 EST 2012

Dear list,

I'm using a USRP2 and have developed my own firmware and software image. Up
until this point I've been using the JTAG to program the FPGA, and the UART
to write my software program to the on-chip RAM. This helped me develop
much faster.

Now that I'm closer to 'production' I wanted to start using the CPLD and SD
card. I ran into a strange problem where it looks like the FPGA is being
held in reset when I program it using the SD card. I have an FPGA image
similar to the following:

input rst_n, // This is the little pushbutton switch
output [5:0] leds,
output [31:0] debug,

input clk_fpga_p,
output clk_fpga_n,


IBUFGDS clk_fpga_pin (.O(clk_fpga_unbuf),.I(clk_fpga_p),.IB(clk_fpga_n));
BUFG clk_fpga_BUF (.O(clk_fpga),.I(clk_fpga_unbuf));

assign leds = {6{~rst_n}};
reg stuff;
always @(posedge clk_fpga)
  stuff <= ~stuff;
assign debug = {32{stuff}};

When I load this image via the JTAG connector I can see the 'debug' lines
toggling at 25 MHz, as expected (the fpga clock is still 50 MHz because the
clock divider hasn't been set to 1 yet). When I load this via the SD card I
do not see the debug lines toggling. I do however see the leds toggling if
I push the switch. I also verified that the fpga_clk is there and is 50 MHz
by sending it out the debug lines.

So the fpga clock is there, the image clearly loaded (as is evident by the
leds toggling). But it just doesn't do anything. What am I doing wrong?

I copy the image to the SD card using the following command. Not sure if
this is important:

u2_flash_tool --dev=/dev/sdb -t fpga u2_top.bin -w

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