[USRP-users] Ettus Research Announcements -- Nov 2010

Matt Ettus matt at ettus.com
Mon Nov 15 12:23:06 EST 2010


On 11/15/2010 05:06 AM, Per Zetterberg wrote:
>> 	- Xilinx Spartan 3A-DSP3400 FPGA
>> 	- on-board TCXO frequency reference
>> 	- Flash configuration memory.
>> 	- An improved ADC (still 14 bits, 100 MS/s)
>>

To clarify, both the USRP2 and N210 use the same 100 MHz VCXO as the 
main system oscillator.  On the USRP2 it can either be locked to an 
external reference or allowed to free-run.  On the N210, it can be 
locked to an external reference or it can be locked to the internal 10 
MHz TCXO.

> Can the on-board TCX0 be used also as an output e.g. to connect it to
> the "REF CLOCK" of a USRP2 ?

It is not set up to be an output.

> What is the specification of the TCX0 ? (phase-noise ...)

It is a FOX924, so you can get all of the specs from its data sheet. 
Because the VCXO has very low phase noise, it is locked to the TCXO at a 
very low loop bandwidth.  TCXO phase noise is thus not a factor in the 
actual system phase noise.

In summary, USRP2 and N210 have essentially the same phase noise.  The 
N210 will just have a more accurate frequency ( ~1 ppm vs. ~20 ppm).

> In what way is the the new ADC better?

It has better SNR and has internal programmable analog and digital gain. 
  Overall system noise figure is a about 1.5 dB better.  It is still 14 
bits and 100 MS/s just like the USRP2.

Matt




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